Princeton Quantum Colloquium: Hardware-efficient quantum error correction using concatenated bosonic qubits, Fernando Brandao (Caltech)

Date
Sep 23, 2024, 12:30 pm1:30 pm
Location

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Event Description

Title: Hardware-efficient quantum error correction using concatenated bosonic qubits

Abstract: In order to solve problems of practical importance, quantum computers will likely require error correction which encodes fault-tolerant logical qubits into many noisy physical qubits. The large overheads projected for achieving fault-tolerant quantum computers motivate the search for more hardware-efficient platforms error-correction strategies.  A promising direction to reduce the error correction overhead is to employ bosonic qubits, formed by states of a bosonic mode. I will discuss an experimental realization of a logical qubit built at the AWS Center for Quantum Computing. We built a superconducting circuit which implements a repetition code up to distance five of cat qubits stabilized in bosonic modes. Phase-flip errors on the data cat qubits are corrected by the repetition code using ancilla transmons. The cat qubits are passively protected against bit-flip errors by two photon dissipation and all the operations needed for error correction, including the controlled-not gate, retain a bias against bit-flip errors. Our experiment is the first to leverage built-in bosonic error correction in concert with an outer concatenated code and biased noise. 

A light lunch will be served outside of Maeder Auditorium at noon.